发明名称 ARITHMETIC PROCESSING UNIT
摘要 PROBLEM TO BE SOLVED: To efficiently execute prefetch by minimizing the problem of cache contamination or the like by inserting a prefetch instruction into an instruction stream based on execution time information in an arithmetic processor equipped with a cache memory. SOLUTION: This arithmetic processing unit is executed by dynamically inserting a prefetch instruction to previously instruct the transfer of data from a main memory to a cache memory into an instruction column, and provided with a means for selecting the instruction being the target of prefetch processing from among instructions resulting in cache mistakes, a means for predicting a memory access address at the time of executing the instruction being the target of the prefetch processing, a means for deciding the inserting position of the prefetch instruction corresponding to the instruction being the target of prefetch processing into the instruction column, and a means for inserting the prefetch instruction whose operand has the predicted memory access address into the decided inserting position. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003223359(A) 申请公布日期 2003.08.08
申请号 JP20020020244 申请日期 2002.01.29
申请人 FUJITSU LTD 发明人 YAMAMURA SHUJI;KUMON KOICHI;SATO MITSURU
分类号 G06F12/08;G06F9/30;G06F9/32;G06F9/38;(IPC1-7):G06F12/08 主分类号 G06F12/08
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