发明名称 PACKET SCHEDULING DEVICE AND ITS METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a packet scheduling device which impartially decides output order in a round without reducing throughput and decides an output flow by a small amount of calculation even in the case of a large number of flows and also to provide its method. <P>SOLUTION: The packet scheduling device includes a buffer memory 1 for storing packets by flow, and a packet transmitting means 3 for transmitting the packet of the designated flow among the packets stored in the buffer memory. The device also comprises a transmission packet deciding means 12 for deciding the competition of the output flows by a DRR system using a heap and designating the decided flow to the packet transmitting means. Thus, control is minutely performed by minimally setting a reference amount, output order in the round is impartially decided, and the transmission flow is determined by the calculation amount of 0 [log<SB>2</SB>(flow number)] in the case of a large number of flows. <P>COPYRIGHT: (C)2003,JPO</p>
申请公布号 JP2003224594(A) 申请公布日期 2003.08.08
申请号 JP20020021962 申请日期 2002.01.30
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 SAKAI TOJI;SUZUKI MUNEYOSHI
分类号 H04L12/815;H04L12/863;H04L12/867;H04L12/875;(IPC1-7):H04L12/56 主分类号 H04L12/815
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