发明名称 Object addressed memory hierarchy
摘要 A computer system including a processor, an object cache operatively connected to the processor, a memory, and a translator interposed between the object cache and the memory, wherein the translator maps an object address to a physical address within the memory.
申请公布号 US2003149858(A1) 申请公布日期 2003.08.07
申请号 US20020072169 申请日期 2002.02.07
申请人 WRIGHT GREGORY M.;WOLCZKO MARIO I.;SEIDL MATTHEW L. 发明人 WRIGHT GREGORY M.;WOLCZKO MARIO I.;SEIDL MATTHEW L.
分类号 G06F12/08;G06F12/10;(IPC1-7):G06F12/00 主分类号 G06F12/08
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