发明名称 LOGICAL OPERATION CIRCUIT AND LOGICAL OPERATION METHOD
摘要 A logical operation circuit and logical operation method for performing logical operation of data by using a ferroelectric capacitor. A logical operation circuit (1) comprises a ferroelectric capacitor (CF) and a transistor (MP). The ferroelectric capacitor (CF) holds a polarized state P1 (y=1) or P2 (y=0) corresponding to first data y to be operated. In operation, a first terminal (3) of the ferroelectric capacitor (CF) is precharged to a power supply potential Vdd, and a second terminal (5) is given a potential corresponding to second data x to be operated, namely, a grounding potential GND (x=1) or the power supply potential Vdd (x=0) through a bit line (BL). By adequately setting the threshold voltage Vth of the transistor (MP), the transistor (MP) is (on, on, on, off) for the combinations (0-0, 0-1, 1-0, 1-1) of x and y, respectively.
申请公布号 WO03065582(A1) 申请公布日期 2003.08.07
申请号 WO2003JP00568 申请日期 2003.01.22
申请人 ROHM CO., LTD.;KAMEYAMA, MICHITAKA;HANYU, TAKAHIRO;KIMURA, HIROMITSU;FUJIMORI, YOSHIKAZU;NAKAMURA, TAKASHI;TAKASU, HIDEMI 发明人 KAMEYAMA, MICHITAKA;HANYU, TAKAHIRO;KIMURA, HIROMITSU;FUJIMORI, YOSHIKAZU;NAKAMURA, TAKASHI;TAKASU, HIDEMI
分类号 G11C7/10;G11C11/00;G11C11/16;G11C11/22;G11C15/04;H03K19/16;H03K19/185;(IPC1-7):H03K19/20;G11C11/15 主分类号 G11C7/10
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