| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce the number of paths between an n×n bit data buffer for image rotation and an (n) bit data buffer in output side to a half without lowering image rotation speed to simplify wiring in logic synthesis of a circuit. <P>SOLUTION: An image rotation apparatus has an input (n) bit data buffer 1, a previous image rotation n×n bit data buffer 2, a following image rotation n×n bit data buffer 3, and an output (n) bit data buffer 4. In the image rotation apparatus, image data is transferred with rotation by 90° in order of the input (n) bit data buffer 1, the previous image rotation n×n bit data buffer 2, the following image rotation n×n bit data buffer 3 and the output (n) bit data buffer 4. <P>COPYRIGHT: (C)2003,JPO |
