发明名称 Verbindungsprüfung unter Verwendung von Leiterplatten-Topologiedaten
摘要 A method for generating improved detection and diagnostic test patterns and for improving the diagnostic resolution of interconnect testing of a circuit is based on the premise that short-circuits are most likely to result from solder bridges between closely adjacent pins. In a first embodiment, an optimal boundary-scan test pattern is generated. In a second embodiment, boundary-scan test diagnosis is enhanced. In a third embodiment, diagnosis of unpowered short-circuit testing is enhanced. <IMAGE>
申请公布号 DE69528914(T2) 申请公布日期 2003.07.31
申请号 DE1995628914T 申请日期 1995.02.17
申请人 AGILENT TECHNOLOGIES, INC. (N.D.GES.D.STAATES DELAWARE) 发明人 PARKER, KENNETH P.;POSSE, KENNETH E.
分类号 G01R31/02;G01R31/28;G01R31/3183;G01R31/3185;G06F11/22;(IPC1-7):G06F11/26 主分类号 G01R31/02
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