发明名称 |
FERAM CAPACITOR POST STACK ETCH CLEAN/REPAIR |
摘要 |
The present invention is directed to a method of forming an FeRAM integrated circuit, which includes performing a capacitor stack etch to define the FeRAM capacitor. The method comprises etching a PZT ferroelectric layer with a high temperature BCl3 etch which provides substantial selectivity with respect to the hard mask. Alternatively, the PZT ferroelectric layer is etch using a low temperature fluorine component etch chemistry such as CHF3 to provide a non-vertical PZT sidewall profile. Such a profile prevents conductive material associated with a subsequent bottom electrode layer etch from depositing on the PZT sidewall, thereby preventing leakage or a "shorting out" of the resulting FeRAM capacitor.
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申请公布号 |
US2003143800(A1) |
申请公布日期 |
2003.07.31 |
申请号 |
US20020125662 |
申请日期 |
2002.04.18 |
申请人 |
HALL LINDSEY H.;SUMMERFELT SCOTT R. |
发明人 |
HALL LINDSEY H.;SUMMERFELT SCOTT R. |
分类号 |
H01L21/02;H01L21/311;H01L21/316;H01L21/3213;H01L21/8246;H01L27/105;(IPC1-7):H01L21/00;H01L21/824 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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