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发明名称
Clock skew insensitive scan chain reordering
摘要
申请公布号
EP0809199(B1)
申请公布日期
2003.07.30
申请号
EP19970303362
申请日期
1997.05.16
申请人
LSI LOGIC CORPORATION
发明人
TEENE, ANDRES
分类号
G01R31/28;G01R31/317;G01R31/3185;G06F1/10;G06F11/22;(IPC1-7):G06F17/50;G01R31/318
主分类号
G01R31/28
代理机构
代理人
主权项
地址
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