发明名称 DEVICE FOR GENERATING MODULO NUMBER REMAINDER
摘要 FIELD: computer engineering. SUBSTANCE: device that can be used in digital computing devices and devices for shaping finite fields has delay elements, inhibit circuit, registers, AND gate unit, group of AND gate units, composite modulo adder, groups of AND gates, and group of converters used to convert dual pairs of remainders repetition code of value-remainders into modulo remainder. EFFECT: increased speed of remainder generation. 1 cl, 2 dwg, 1 tab
申请公布号 RU2209460(C2) 申请公布日期 2003.07.27
申请号 RU20000128599 申请日期 2000.11.15
申请人 VORONEZHSKIJ GOSUDARSTVENNYJ UNIVERSITET 发明人 IRKHIN V.P.;IVANKIN G.E.;ERMAKOV A.E.;CHEKALIN S.S.;GUL'BIN S.S.
分类号 G06F7/72;H03M7/18 主分类号 G06F7/72
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