发明名称 HIGH VOLTAGE VERTICAL MOS TRANSISTOR AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a high voltage vertical MOS transistor in which a trench region extended to a semiconductor substrate layer is filled by a gate layer without adopting a photolithographic step and a constitution in which a deep groove is formed at a side of a gate electrode layer, and to provide a method for manufacturing the same. SOLUTION: The method for manufacturing the high voltage vertical MOS transistor comprises (1) the step of forming a first conductivity type epitaxial layer 12 on the semiconductor substrate layer 11, forming a second conductivity type base layer 13 and a first conductivity type source layer 14 on the epitaxial layer 12, and forming the trench region 15 so as to be extended into the substrate layer 11 through the epitaxial layer 12, the base layer 13 and the source layer 14; (2) the step of forming an insulation film in the trench region 15; (3) the step of selectively implanting an impurity in side walls of the base layer 13 and the source layer 14 by ion implanting; (4) the step of removing an insulation film region in which the impurity is selectively implanted by etching; and (5) the step of embedding the trench region 15 with the gate electrode layer 20 to be sequentially conducted. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003209252(A) 申请公布日期 2003.07.25
申请号 JP20020008741 申请日期 2002.01.17
申请人 OKI ELECTRIC IND CO LTD 发明人 TAKECHI EIJI
分类号 H01L29/78;H01L21/336;(IPC1-7):H01L29/78 主分类号 H01L29/78
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