发明名称 Process and circuit arrangement to monitor physical parameters
摘要 In digital assemblies, the power supply voltage (U1, U2) is monitored by a voltage monitoring module (RG1, RG2). If the power supply voltage (U1, U2) deviates from its setpoint range, the voltage monitoring module (RG1, RG2) triggers a Reset of the entire digital assembly so as to prevent undefined logic states. A Power-On Reset signal is also produced when the power supply voltage (U1, U2) is turned on, which has the effect that the digital assembly transitions to its operating state only after a defined time. For systems whose fail-safeness has certain minimum requirements placed on it, it is common to perform online diagnoses. It is desirable to also incorporate the voltage monitoring module (RG1, RG2) into this online diagnosis. However, a test of the voltage monitor produces the same Power-On Reset as, for example turning on the power, and a "true" Power-On Reset is very difficult to differentiate from a "simulated" one. According to the invention, this is solved in that the monitoring is performed by at least two independent monitoring modules (RG1, RG2) whose signals are linked through linking means (V1, V2, V3, V4). This makes it possible to test the two independent monitoring modules (RG1, RG2) independent of one another.
申请公布号 US2003135345(A1) 申请公布日期 2003.07.17
申请号 US20020238883 申请日期 2002.09.11
申请人 SEITZ HANS-JUERGEN 发明人 SEITZ HANS-JUERGEN
分类号 G01R19/165;H04B17/00;(IPC1-7):G06F19/00 主分类号 G01R19/165
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