| 发明名称 |
Memory structure and method making |
| 摘要 |
A memory structure has a plurality of row conductors intersecting a plurality of column conductors at a plurality of intersections. Each intersection includes an electrically linear resistive element in series with a voltage breakdown element.
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| 申请公布号 |
US2003132458(A1) |
申请公布日期 |
2003.07.17 |
| 申请号 |
US20020051677 |
申请日期 |
2002.01.16 |
| 申请人 |
VAN BROCKLIN ANDREW L.;FRICKE PETER |
发明人 |
VAN BROCKLIN ANDREW L.;FRICKE PETER |
| 分类号 |
H01L21/82;H01L27/10;(IPC1-7):H01L27/10;H01L29/00 |
主分类号 |
H01L21/82 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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