发明名称 MEMORY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a memory device in which a row block decoder is abolished and area on layout can be utilized effectively. <P>SOLUTION: The device is provided with a memory cell array 200 comprising a plurality of row blocks b0-bM, a row control section 100 outputting a row block enable-signal msb and a row block selecting signal xmat<SB>-</SB>yf based on a row address signal bax9B<SB>-</SB>b from a row address pre-decoder 500 and a row fuse 400 a row redundancy signal from a row fuse 400, a plurality of word lines 203 transmitting the row block enable-signal msb to a corresponding row block, a column fuse box array 600, and a memory cell array through wiring 700 arranged so as to transmit the row block selecting signal xmat<SB>-</SB>yf to the column fuse box array 600 through the memory cell array 200. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003196997(A) 申请公布日期 2003.07.11
申请号 JP20020354939 申请日期 2002.12.06
申请人 HYNIX SEMICONDUCTOR INC 发明人 KANG SANG HEE
分类号 H01L27/108;G11C8/14;G11C11/401;G11C11/407;G11C29/00;G11C29/04;H01L21/8242 主分类号 H01L27/108
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