发明名称 MOS TRANSISTOR OUTPUT CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide an MOS transistor output circuit that can highly set a current limitation value, without decreasing withstanding quantity in load short- circuiting. <P>SOLUTION: When an overcurrent flows to a MOS transistor 21 at a high side, a first N-channel type MOS transistor 28 for switching for composing a clamp circuit 26 for clamping between the gate and source of the MOS transistor 21 makes continuity with a second N-channel type MOS transistor 30 for switching by applying an overcurrent detection signal to the gate. In a period where load is relatively light, the voltage difference between a booster potential Vcp of a charge pump 24 and a potential Vo of an output terminal is divided by a resistor 31 for clamping for composing the clamp circuit 26 for clamping. Conversely, in a period where the load is relatively heavy, a Zener diode 29 for composing the clamp circuit 26 is made to break down, the voltage is divided by resistors 26 and 31 for clamping, and the output current of the MOS transistor 21 is limited. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003198277(A) 申请公布日期 2003.07.11
申请号 JP20010393301 申请日期 2001.12.26
申请人 NEC KANSAI LTD 发明人 YANAGAWA HIROSHI
分类号 H03G11/02;H03F1/52 主分类号 H03G11/02
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