| 摘要 |
PURPOSE: A method for fabricating an exposure mask of a semiconductor device is provided to form a contact hole of a predetermined size in a design rule of not greater than 100 nanometer by forming an exposure mask of a predetermined size while using a line/space pattern. CONSTITUTION: A mask layer(13) is formed on a quartz substrate(11). The first photoresist layer pattern for an electron beam having a line/space type is formed on the mask layer. A planarization layer is formed to planarize the upper portion of the resultant structure. The second photoresist layer pattern for an electron beam is formed on the planarization layer, having a line/space type vertical to the first photoresist layer pattern. An etch process is performed by using the first and second photoresist layer patterns as a mask until the quartz substrate is exposed. The first and second photoresist layer patterns are removed to form a mask layer pattern.
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