发明名称 |
METHOD FOR PLANARIZING SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A planarization method of a semiconductor device is provided to be capable of preventing processing failure due to the thickness difference of an interlayer dielectric. CONSTITUTION: Insulating particles(23) are deposited on a semiconductor substrate(21) having metal patterns(22) by using sol-gel technique. The metal patterns(22) and the insulating particles(23) are planarized. The insulating particles(23) are sintered. Then, an insulating layer(24) is formed on the entire surface of the resultant structure. At this time, PETEOS(Plasma Enhanced Tetra Ethyl Ortho Silicate) is used as the insulating layer(24).
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申请公布号 |
KR20030056906(A) |
申请公布日期 |
2003.07.04 |
申请号 |
KR20010087247 |
申请日期 |
2001.12.28 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
JUNG, JONG YEOL;YOON, IL YEONG |
分类号 |
H01L21/3105;(IPC1-7):H01L21/310 |
主分类号 |
H01L21/3105 |
代理机构 |
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地址 |
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