发明名称 FET/bipolar integrated logic circuits
摘要 An inverter circuit that includes a FET input transistor having a gate, a source, a drain and a FET output transistor having a gate, a source and a drain. The circuit further includes first and second power lines and a constant current source. No transistor other than the input and output transistors is coupled between the input and output terminals. Also, a Bipolar inverter circuit, a FET NAND/AND function circuit, a Bipolar NAND/AND function circuit, a FET differential circuit and a Bipolar differential circuit using the inverter circuit as a building block.
申请公布号 US2003122585(A1) 申请公布日期 2003.07.03
申请号 US20020039754 申请日期 2002.01.03
申请人 SHARMA RAMAUTAR 发明人 SHARMA RAMAUTAR
分类号 H03K19/082;H03K19/091;H03K19/0948;(IPC1-7):H03K19/094 主分类号 H03K19/082
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