发明名称 |
APPARATUS AND METHOD FOR AN INTEGRATED CIRCUIT HAVING HIGH Q REACTIVE COMPONENTS |
摘要 |
IN AN IC PACKAGING SCHEME, A MULTILAYER SUBSTRATE (822) IS COMPOSED OF ELECTRICALLY CONDUCTIVE LAYERS (824 & 826) OF INTERCONNECTS (840 -810), SEPARATED BY INSULATIVE LAYERS OF EPOXY RESIN OR CERAMIC AND CONNECTED BY VIAS (850 -854). PASSIVE ELEMENTS ARE INTEGRATED WITHIN THE SUBSTRATE AT THE DEFINITION STAGE DURING LAYOUT OF THE INTERCONNECTS (840 -810). THE PASSIVES CAN BE USED TO ENHANCE THE ELECTRICAL PERFORMANCE OF THE ACTIVE CIRCUIT DIE TO A MAXIMUM EXTENT ALLOWED BY THE MATERIAL TECHNOLOGY USED FOR THE SUBSTRATE. MATERIAL SELECTION FOR THE PACKAGE IS MADE TO ALLOW FOR THE BEST PASSIVE INTEGRATION FOR A GIVEN CIRCUIT DESIGN. TYPICAL APPLICATIONS INCLUDE POWER SUPPLY BYPASS CAPACITORS, RADIO FREQUENCY TUNING, AND IMPEDANCE MATCHING. THE INCORPORATION OF PASSIVES IN THE PACKAGING SUBSTRATE CREATES A NEW CLASS OF ELECTRICALLY TAILORABLE PACKAGING THAT CAN DERIVE IMPROVED PERFORMANCE FOR ANY GIVEN DIE DESIGN OVER EXISTING APPROACHES. (FIGURE 8) |
申请公布号 |
MY115514(A) |
申请公布日期 |
2003.06.30 |
申请号 |
MY1999PI05704 |
申请日期 |
1999.12.23 |
申请人 |
ATMEL CORPORATION |
发明人 |
ROBERT J. ZAVREL, JR;DAN C. BAUMANN |
分类号 |
H01L23/04;H01L23/12;H01L23/538;H01L23/66;H01L25/00;H01L25/16;H01L27/06;H01L27/08;H01L29/00;H05K1/16;H05K3/46 |
主分类号 |
H01L23/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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