发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device that prevents a parasitic transistor formed in a well region 4 from being brought to ON-state, even when the voltage of an active layer is changed abruptly. SOLUTION: On the substrate of a semiconductor on insulator having a dielectric layer 2 formed on a support substrate 1 and an active layer 3 formed on the dielectric layer 2, a P-type well region 4 is formed by the implantation of impurity ions, and at least one NMOS transistor 20 is formed in the P-type well region 4. Since a contact region for back gate 7 is formed to adjoin or overlap the source region 5 of the NMOS transistor 20 formed in the well region 4, a parasitic resistance 12 between the base of a parasitic NPN transistor 11 and the contact region for back gate 7 can be reduced to such an extent that it can be ignored, so that the parasitic NPN transistor 11 being brought to an ON-state is prevented. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003179154(A) 申请公布日期 2003.06.27
申请号 JP20010377363 申请日期 2001.12.11
申请人 TOSHIBA CORP 发明人 NOMA HIROSHI
分类号 H01L21/8234;H01L27/088;H01L29/786;(IPC1-7):H01L21/823 主分类号 H01L21/8234
代理机构 代理人
主权项
地址