发明名称 Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing
摘要 Methods are disclosed for forming gate dielectrics for MOSFET transistors, wherein a bilayer deposition of a nitride layer and an oxide layer are used to form a gate dielectric stack. The nitride layer is formed on the substrate to prevent oxidation of the substrate material during deposition of the oxide layer, thereby avoiding or mitigating formation of low-k interfacial layer.
申请公布号 US2003116804(A1) 申请公布日期 2003.06.26
申请号 US20020176596 申请日期 2002.06.21
申请人 VISOKAY MARK ROBERT;ROTONDARO ANTONIO LUIS PACHECO;COLOMBO LUIGI 发明人 VISOKAY MARK ROBERT;ROTONDARO ANTONIO LUIS PACHECO;COLOMBO LUIGI
分类号 H01L21/265;H01L21/28;H01L29/51;(IPC1-7):H01L27/01;H01L27/12;H01L31/039 主分类号 H01L21/265
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