| 发明名称 |
CLOCK TREE SYNTHESIS FOR MIXED DOMAIN CLOCKS |
| 摘要 |
A clock tree syntheses (CTS) tool designs a group of clock trees (30) to be incorporated into an IC design for conveying separate clock signals to clock sinks within the IC with a predetermined maximum group skew (36).
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| 申请公布号 |
WO03052643(A1) |
申请公布日期 |
2003.06.26 |
| 申请号 |
WO2002US39843 |
申请日期 |
2002.12.13 |
| 申请人 |
SILICON PERSPECTIVE CORPORATION |
发明人 |
CHANG, JUI-MING;TENG, CHIN-CHI;DAI, WEI-JIN |
| 分类号 |
G06F1/10;G06F17/50;H01L21/82;(IPC1-7):G06F17/50 |
主分类号 |
G06F1/10 |
| 代理机构 |
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代理人 |
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