| 摘要 |
PURPOSE: A method of forming dual damascene pattern in a semiconductor device is provided to improve electrical property of device and reliability of process by preventing formation of fence at the edge of the upper part of a contact hole to improve metal buried characteristic with dual damascene pattern. CONSTITUTION: An interlayer dielectric(400) is formed which has the first insulation layer(42), an etch stop layer(43), the second and third insulation layer(44,45) on a semiconductor substrate(41). The second insulation layer having a higher etching speed compared to the first and third insulation layer is formed. A contact hole(46a) is formed to expose the junction region(41a) of the semiconductor device by etching a portion of the interlayer dielectric. The region of the second insulation layer to be a trench is removed by etching the second insulation layer. A trench is formed on the third insulation layer.
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