SEMICONDUCTOR MEMORY DEVICE WITH PRECHARGE VOLTAGE LINE OF MESH STRUCTURE

摘要

PURPOSE: A semiconductor memory device with a precharge voltage line of a mesh structure is provided to enhance the efficiency of a test by supplying precharge voltages of two or more different levels at a test mode. CONSTITUTION: A semiconductor memory device includes a plurality of memory cell arrays, a plurality of bit line precharge circuit portions, and a plurality of precharge voltage lines. The memory cell arrays include a plurality of memory cells and a plurality of bit line couples connected to the memory cells, respectively. The memory cell arrays are arranged in matrix. The bit line precharge circuit portions precharge and equalize the bit line couples of the corresponding memory cell array by using the predetermined precharge voltage. The precharge voltage lines are arranged in a shape of mesh at each region between the memory cells arrays. The precharge voltage lines are used for supplying the same precharge voltage to the bit line precharge circuit portions at a normal mode and the precharge voltages of different levels to the bit line precharge circuit portions at a test mode.