发明名称 LEVEL SHIFTER CIRCUIT SUITABLE FOR LOW INPUT VOLTAGE
摘要 PURPOSE: A level shifter circuit suitable for low input voltage is provided to perform a normal operation within a range of an operating voltage of logic gates while an input voltage is lowered. CONSTITUTION: A level shifter circuit includes a gain amplification portion(330), the first level shifter portion(340), the second level shifter portion(350), and the third level shifter portion(360). The gain amplification portion is operated between the first voltage and a ground voltage in order to generate an amplified supply voltage by amplifying the second voltage. The first level shifter portion is operated between the amplified supply voltage and the ground voltage in order to generate the first and the second amplified voltages by amplifying an input signal and an inverse signal of the input signal. The second level shifter portion is operated between the amplified supply voltage and the third voltage in order to generate the third and the fourth amplified voltages by amplifying the first and the second amplified voltages. The third level shifter portion is operated between the first voltage and the third voltage in order to generate an output voltage by amplifying the third and the fourth amplified voltages.
申请公布号 KR20030050352(A) 申请公布日期 2003.06.25
申请号 KR20010080770 申请日期 2001.12.18
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, GEUM MUK
分类号 G09G3/36;(IPC1-7):G09G3/36 主分类号 G09G3/36
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