发明名称 |
Binary self-correcting phase detector for clock and data recovery |
摘要 |
A phase detector for a clock and data recovery circuit from random non-return-to zero (NRZ) data signal includes a plurality (e.g., preferably three) edge-triggered flip-flops. The incoming NRZ data are sampled by a pair of edge-triggered flip-flops using the transition of the clock generated by the clock recovery circuit. A third edge-triggered flip-flop processes the outputs from the edge-triggered flip-flop pair to indicate whether the generated clock leads or lags the received data.
|
申请公布号 |
US6577694(B1) |
申请公布日期 |
2003.06.10 |
申请号 |
US19990435838 |
申请日期 |
1999.11.08 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
MEGHELLI MOUNIR |
分类号 |
H03D13/00;(IPC1-7):H03D3/24 |
主分类号 |
H03D13/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|