| 摘要 |
PROBLEM TO BE SOLVED: To provide an FET having a high breakdown voltage which is capable of reducing an on-resistance to a sufficiently low level during operation, and also to provide a method of manufacturing the same. SOLUTION: A multilayer structure consists of a p-type GaN channel layer 16, an n-type GaN source layer 18, and an n-type GaN drain layer 14, with the p-type GaN channel layer 16 held from up and down by the n-type GaN source layer 18 and the n-type GaN drain layer 14. The structure is processed into a mesa shape, and inclined surfaces are formed on the side faces of the mesa. On the inclined side faces of the p-type GaN channel layer 16 on the inclined surfaces, gate electrodes 40Ga and 40Gb are formed via an SiO<SB>2</SB>gate insulation film 24. That is, the inclined side faces of the p-type GaN channel layer 16 are used as a channel region. Due to this structure, the channel length of the channel region can be controlled by the thickness of the p-type GaN channel layer 16, resulting in the achievement of the reduction in the channel length easily and accurately. COPYRIGHT: (C)2003,JPO
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