| 摘要 |
A semiconductor device 100 has a peripheral cell region 102 and an internal cell region. The peripheral cell region is provided with a signal input terminal 110 that inputs input signals having different voltage levels in a normal operation mode and in a test mode starting time; a first transmission circuit 120 that provides the input signal to the internal cell region; and a second transmission circuit 150 that outputs a control signal indicating a test mode when the input signal has a voltage level equivalent to a voltage to be provided when the test mode is started. Also, a control circuit 180 that cuts off current that flows in the second transmission circuit 150 when the input signal has a voltage level to be provided in the normal operation mode. The control circuit 180 includes first and second P-type transistors 182 and 184 formed in a floating N-type well.
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