发明名称 FLASH MEMORY DEVICE OF MULTI-BANK STRUCTURE
摘要 PURPOSE: A flash memory device of a multi-bank structure is provided to perform a dual operation the multi-bank structure by sorting input addresses into read addresses and write addresses. CONSTITUTION: A plurality of banks(100-400) includes a plurality of memory cell arrays(208,211,214,217) and a plurality of row and column decoders(207,210,213,216). An address sorting portion(202) sorts input addresses into read addresses and write addresses. The first selection portion(203,204) performs a read operation by selecting one bank from the plural banks. The second selection portion(205,206) performs a write operation by selecting one bank from the plural banks. A plurality of sense amplifiers(219,220) are used for comparing data of the banks with a reference cell. A pumping portion(221) applies the predetermined bias to the banks.
申请公布号 KR20030042679(A) 申请公布日期 2003.06.02
申请号 KR20010073421 申请日期 2001.11.23
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, MIN GYU;WON, SAM GYU
分类号 G11C16/02;G11C16/06;G11C16/10;G11C16/28;(IPC1-7):G11C16/06 主分类号 G11C16/02
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