发明名称 PLL SYNTHESIZER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To prevent the deterioration of an RFPLL output due to the leak of an IF harmonic component. SOLUTION: A filter 18 is provided for preventing an IF harmonic component generated with an IFVCO 14I from leaking to an RFVCO 14R side or from leaking to a transmitting/receiving RF mixer side on a feedback path from the IFVCO 14I to a signal input terminal finIF for an IF of a dual PLLIC 10, on a feedback path from the RFVCO 14R to a signal input terminal finRF for an RF of the dual PLLIC 10, or a signal supply path from the RFVCO 14R to the transmitting/receiving RF mixer.
申请公布号 JP2003158454(A) 申请公布日期 2003.05.30
申请号 JP20010355006 申请日期 2001.11.20
申请人 MURATA MFG CO LTD 发明人 KAKISHIMA KAZUYUKI;NAKAMURA HIDEAKI
分类号 H03L7/22;H04B1/26;(IPC1-7):H03L7/22 主分类号 H03L7/22
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