| 发明名称 |
Method of manufacturing semiconductor integrated circuit device having silicide layers |
| 摘要 |
A MISFET capable of a high speed operation includes a metal silicide layer in a high concentration region aligned with a gate side wall layer on a self-alignment basis. A MISFET which can be driven at a high voltage includes an LDD portion having a width greater than the width of the side wall layer, a high concentration region in contact with the LDD portion and a metal silicide layer in the high concentration region.
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| 申请公布号 |
US6569742(B1) |
申请公布日期 |
2003.05.27 |
| 申请号 |
US19990471321 |
申请日期 |
1999.12.23 |
| 申请人 |
HITACHI, LTD. |
发明人 |
TANIGUCHI YASUHIRO;SHUKURI SHOJI;KURODA KENICHI;IKEDA SHUJI;HASHIMOTO TAKASHI |
| 分类号 |
H01L27/04;H01L21/336;H01L21/822;H01L21/8234;H01L21/8238;H01L21/8242;H01L21/8247;H01L27/092;H01L27/10;H01L27/105;H01L27/108;H01L29/78;(IPC1-7):H01L21/336 |
主分类号 |
H01L27/04 |
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