发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To form SOI MISFET where speed is made fast and power consumption is made low while the area of a semiconductor integrated circuit is suppressed and floating body effect can be suppressed. SOLUTION: MISFET where a body 10 straddles an SOI region 7 and a non-SOI region 8 is formed on a silicon substrate 11 where the SOI region 7 on which an embedded oxidized film layer 4 is formed and the non-SOI region 8 on which the buried oxidized layer is not formed coexist. Thus, SOI MISFET can be formed with high density and the area of the semiconductor integrated circuit can be reduced. Junction capacitance can be reduced and body potential can be fixed. The speed of the integrated circuit can be made fast, power consumption can be made low and floating body effect can be suppressed.
|
申请公布号 |
JP2003152186(A) |
申请公布日期 |
2003.05.23 |
申请号 |
JP20010345456 |
申请日期 |
2001.11.12 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
HIRATA AKIO;YAMAMOTO HIROO;KATSURA AKIHITO |
分类号 |
H01L21/762;H01L21/82;H01L21/822;H01L21/8238;H01L27/04;H01L27/08;H01L27/092;H01L29/78;H01L29/786;(IPC1-7):H01L29/786;H01L21/823 |
主分类号 |
H01L21/762 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|