发明名称 |
LATERAL TRANSISTOR AND FABRICATING METHOD THEREOF |
摘要 |
PURPOSE: A method for fabricating a lateral transistor is provided to improve characteristics like base transit time, emitter efficiency and common emitter current gain by diffusing impurities into the periphery of an emitter area and a collector area. CONSTITUTION: A P-type substrate(2) of an almost plate type is prepared. An N¬+ type buried layer(4) is formed on the P-type substrate. A predetermined thickness of an N¬- type epi-layer(6) is grown on the P-type substrate and the N¬+ type buried layer. An oxide layer in which a plurality of predetermined regions are opened by a photolithography process is formed on the N¬- type epi-layer. A predetermined thickness of an N-type well(14) is formed in the N¬- type epi-layer opened by the oxide layer. An N¬+ type base area(12) is formed inside the N-type well wherein the N¬+ type base area is connected to the N¬+ type buried layer. Boron is diffused/ion-implanted into a position separated from the N¬+ type base area by a predetermined distance to form a P-type emitter area(8) and a P-type collector area(10).
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申请公布号 |
KR20030039695(A) |
申请公布日期 |
2003.05.22 |
申请号 |
KR20010070718 |
申请日期 |
2001.11.14 |
申请人 |
KEC CORP. |
发明人 |
JUN, BON GEUN;LEE, JEONG HWAN;YOON, DONG HYEON |
分类号 |
H01L29/735;(IPC1-7):H01L29/735 |
主分类号 |
H01L29/735 |
代理机构 |
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