发明名称 Technique for practically measuring cycle-by-cycle repeatable system behavior
摘要 The present invention relates to a system and method for practically measuring cycle by cycle repeatable system behavior. A set of system parameters is selected for tracking by a group of counters which preferably operate to condense the system state trajectory into a manageable set of counter values thereby forming a counter state. Preferably, repeatability of the counter state practically assures repeatability of the system state trajectory. System repeatability is helpful for debugging purposes since definite identification of a system defect is made easier when a test program failure caused by exercising a defect is repeatable. A test program may be varied for successive runs on a computer system by employing a different randomly or pseudo-randomly generated seed for each run and preferably exercising as many features of the computer system as possible in order to search for defects in the computer system. Since it may be difficult to reproduce a failure, once detected, by repeating only a single run of the test program, the inventive mechanism is preferably able to initiate execution of a sequence of test program runs starting at a point many test program runs prior to the occurrence of the error. Once a failure is identified which is at least occasionally repeatable, a trace may be collected to gather detailed information on internal system nodes for successive clock cycles within a timing window in which the failure repeatedly occurs.
申请公布号 US6567924(B1) 申请公布日期 2003.05.20
申请号 US20000545599 申请日期 2000.04.07
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 MCGEE JAMES RIDENOUR;VAN GELDER JOHN MARK
分类号 G06F1/14;(IPC1-7):G06F1/14 主分类号 G06F1/14
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