发明名称 Management of resets for interdependent dual small computer standard interface (SCSI) bus controller
摘要 A device includes a first SCSI bus, a second SCSI bus, a first bus controller slot, a second bus controller slot and a bus controller in one of the first bus controller slot and the second bus controller slot. The bus controller includes reset circuitry for generating a SCSI bus reset signal. The SCSI bus reset signal being used to reset the first SCSI bus when the bus controller is in the first bus controller slot and the first SCSI bus is isolated from the second SCSI bus. The SCSI bus reset signal being used to reset the second SCSI bus when the bus controller is in the second bus controller slot and the first SCSI bus is isolated from the second SCSI bus. The SCSI bus reset signal is to reset both the first SCSI bus and the second SCSI bus when the first SCSI bus and the second SCSI bus are bridged and one of the following conditions is met: the bus controller is in the first bus controller slot, or the bus controller is in the second bus controller slot and the first bus controller slot is empty.
申请公布号 US6567879(B1) 申请公布日期 2003.05.20
申请号 US20000605161 申请日期 2000.06.27
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 BENSON ANTHONY JOSEPH;WHITE JAMES LAWRENCE
分类号 G06F13/38;(IPC1-7):G06F13/00 主分类号 G06F13/38
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