| 摘要 |
PROBLEM TO BE SOLVED: To provide a WDT diagnosing system capable of diagnosing the presence or absence of the abnormality of not only a watch dog timer but also a reset signal input terminal. SOLUTION: A WDT diagnosing circuit 20 outputs a reset signal when a pulse signal from a CPU 10 is away from a prescribed period. At the time of diagnosing failure, a reset signal level is set so as to be a higher level than the H level minimum input voltage of the reset signal input terminal RESB of the CPU so that the reset of the CPU can be prevented. When any failure is not diagnosed, the reset signal level is set so as to be a lower level than the L level maximum input voltage of the reset signal input terminal. The CPU receives the reset signal to a diagnosed result signal input terminal SINI which is different from the reset signal input terminal, and judges whether or not the WDT diagnosing circuit is normal based on the change of the reset signal. When WDT failure or open failure or the like on a route to the reset signal input terminal occurs, the reset signal is not changed so that the abnormality can be detected. |
