| 摘要 |
PROBLEM TO BE SOLVED: To improve the processing speed or function of the whole device by reducing the plus duty factor of a memory and a bus line for the transfer processing of data to a buffer RAM and increasing the access efficiency of the memory. SOLUTION: The holding state of image data in buffer RAMs 31 and 32 is judged (s1, s2), and when the image data is not held in both the RAMs 31 and 32, a 64-bit transfer of image data for reading image data for two 32-bit transfers at once from DRAM 12 by transmitting a single read request from a transfer control part 22 to the DRAM 12 through an interface control part 21, and transferring it to both the RAMs 31 and 32 is performed (s5, s6). The reading frequency of image data from the DRAM 12 to a DMA controller 20 is reduced, compared with the case where image data of the quantity to be transferred to a single buffer RAM is read from the DRAM 12, and the plus duty factor of the memory and bus line can be reduced.
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