Semiconductor memory device for voltage generating circuit, has banks with memory cells, and predecoder selecting and deselecting banks according to addresses received from buffer and latch output

摘要

The device has banks (10-13) having a set of memory cells arranged in rows and columns. A set of predecoders (14, 15) produces a select signal, for selecting the banks based on a bank address received from a buffer, and outputs of counter (17) and fuse (18) by a latch circuit (16). The predecoders also produces a deselecting signal to all other banks other than specific bank for selection in order to deselect them.