发明名称 ANALOG OUTPUT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain an analog output circuit wherein output impedance is low and consumption power is small. SOLUTION: This analog output circuit is constituted of a comparator circuit 1, inverter circuits 2a, 2b and an output circuit 3. In the output circuit 3, a first circuit 4 in which an FET 4a and an FET 4b are connected and a second circuit 5 in which an FET 5a and an FET 5b are connected are connected in series, and an analog output signal Vout is outputted from a connection part of the first and the second circuits. In the comparator 1, the potential of an analog input signal Vin and the potential of an analog output signal Vout are compared with each other, and the FETs 4a, 5a are subjected to on-off control via the inverter circuits 2a, 2b in accordance with the compared result. At this time, a value of conduction resistance of the FET 4b or the FET 5a is determined in accordance with an output of the comparator circuit 1, and control is performed in the direction wherein the analog input signal Vin and the analog output signal Vout match with each other.
申请公布号 JP2003133860(A) 申请公布日期 2003.05.09
申请号 JP20010330062 申请日期 2001.10.29
申请人 MITSUBISHI ELECTRIC CORP;MITSUBISHI ELECTRIC SYSTEM LSI DESIGN CORP 发明人 NAKATANI TAKASHI
分类号 H03F1/56;H03F1/02;(IPC1-7):H03F1/02 主分类号 H03F1/56
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