发明名称
摘要 PURPOSE:To perform local wiring in high density and micronize a memory cell by making a means for lowering the resistance of the gate electrode of a transistor for transfer and a means for forming local wiring common, and arranging the local wiring on the transistor for driving. CONSTITUTION:An n-type well 37, a field oxide film 38, a gate oxide film 39, and a gate electrode 124 are made on an n-type silicon substrate 35, and with the gate electrode 124 as a mask for ion implantation, an n-type impurity region 125 in high concentration is made at the same time with the source and drain region of a MIS transistor. Furthermore, the titanium silicide film 127 of local wiring is made through a silicon oxide film 126 on the gate electrode 124, and one end of the titanium silicide film 127 is connected to the n-type impurity region 125 in high concentration, and the gate electrode 124 is connected to an aluminum wiring 128. Therefore, the lowering of the resistance of the source.drain, gate electrode becomes possible without sharp increase of the number of processes, and also the area of a memory cell is reduced, too.
申请公布号 JP3404123(B2) 申请公布日期 2003.05.06
申请号 JP19940114925 申请日期 1994.05.27
申请人 发明人
分类号 H01L21/336;H01L21/8244;H01L27/10;H01L27/11;H01L29/78 主分类号 H01L21/336
代理机构 代理人
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