发明名称 Data processor having repeat instruction processing using executed instruction number counter
摘要 A data processor configured to repeatedly perform sequential execution of a plurality of instructions in a program in response to a repeat instruction in the program. The data processor includes a counting circuit configured to count every time one instruction of the plurality of instructions is executed; a judgment circuit configured to judge whether the counting circuit counts a predetermined number of times; and an instruction execution control portion configured to control an execution sequence to return to a head instruction of said plurality of instructions following a last instruction in the plurality of instructions in response to a first result output from the judgment circuit indicating that the counting circuit does not count the predetermined number of times.
申请公布号 US6560697(B2) 申请公布日期 2003.05.06
申请号 US20010028697 申请日期 2001.12.28
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 SATO HISAKAZU
分类号 G06F9/32;G06F9/38;(IPC1-7):G06F9/40 主分类号 G06F9/32
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