发明名称 |
Latch structures and systems with enhanced speed and reduced current drain |
摘要 |
Latch structures and systems are disclosed that enhance latch speed and reduce latch current drain while providing complementary metal-oxide-semiconductor (CMOS)-level latch signals. They are realized with bipolar junction structures and CMOS structures that are arranged to limit latch currents in response to CMOS-level sense signals Ssns.
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申请公布号 |
US6556060(B1) |
申请公布日期 |
2003.04.29 |
申请号 |
US20020166220 |
申请日期 |
2002.06.06 |
申请人 |
ANALOG DEVICES, INC. |
发明人 |
DILLON CHRISTOPHER DANIEL;SINGER LAWRENCE A. |
分类号 |
H03K3/012;H03K3/021;H03K3/356;(IPC1-7):H03K3/356 |
主分类号 |
H03K3/012 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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