发明名称 |
Method for adding redundant vias on VLSI chips |
摘要 |
A method is shown which replaces single vias with redundant vias on candidate signals on a semiconductor integrated circuit chip. Where limited space prevents such replacement on more than one signal wire, the method assigns priority to the via through which more current must flow to charge or discharge capacitance. This prioritization reduces the magnitude of delay anomalies arising from vias containing process related resistance defects.
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申请公布号 |
US6556658(B2) |
申请公布日期 |
2003.04.29 |
申请号 |
US20010954791 |
申请日期 |
2001.09.17 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BRENNAN THOMAS CHARLES |
分类号 |
H01L21/768;H01L23/522;(IPC1-7):H04M1/24 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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