发明名称 Vertical electronic circuit package
摘要 An electronic circuit package includes a vertical package section (304, FIG. 3) electrically connected to a horizontal package section (306, FIG. 3). The vertical package section includes multiple conductive layers (512, 514, 516, FIG. 5) oriented in parallel with a vertical plane. A first set of bond pads (606, FIG. 6) on the vertical section's horizontal top surface (608, FIG. 6) can be connected to the bond pads (602, FIG. 6) of an integrated circuit (302, FIG. 3). A second set of bond pads (612, FIG. 6) on the vertical section's horizontal bottom surface (614, FIG. 6) can be connected to bond pads (616, FIG. 6) on the horizontal package section. The conductive layers of the vertical section perform a bond pad pitch conversion in a first direction, and conductive structures (906, 908, 910, FIG. 9) within the horizontal package section perform a bond pad pitch conversion in a second direction.
申请公布号 US6555920(B2) 申请公布日期 2003.04.29
申请号 US20010897369 申请日期 2001.07.02
申请人 INTEL CORPORATION 发明人 CHUNG CHEE-YEE;FIGUEROA DAVID G.;SANKMAN ROBERT L.
分类号 H01L23/498;H05K1/00;H05K1/02;H05K1/14;H05K3/34;H05K3/36;(IPC1-7):H01L23/48 主分类号 H01L23/498
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