| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor memory which can take in and generate internal write-in data reliably even if the flight time of a data bus is made equal to the cycle time of a clock signal. SOLUTION: Positional information indicating the position of a memory for a controller is stored in a positional information generating circuit (7), and the transfer timing of write-in data and the activation timing of a latch transfer indication signal (ZLTTR) transferred to a write-in circuit (3) from an input circuit (9) according to this positional information (PI) are adjusted.</p> |
