发明名称 BUS DIVISION SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a bus division system that enables bus division for maintaining high speed operating performance in circuit operation in a high function and high performance large-scale LSI and in a circuit board of electronic equipment, with simplicity and quickness and even after the manufacture of the LSI and circuit board. SOLUTION: Bus units DB and DB1A to DB1B interconnect a CPU 7 and first to fifth peripheral circuit blocks 11 to 15. The bus units DB and DB1A to DB6B comprise switch circuits 1 to 6. A switch control part 8 controls the switch circuits 1 to 6 to select the shortest routes R1 to R5 out of bus routes in two clockwise and counterclockwise directions. The establishing operation of the high-speed shortest routes R1 to R5 can save optimization by repeated logic designs and layout designs to offer simplicity, quickness, and flexible accommodation to a specification change and the like.
申请公布号 JP2003122463(A) 申请公布日期 2003.04.25
申请号 JP20010314808 申请日期 2001.10.12
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 HIRAMATSU NAOKI;NISHIYAMA KEIICHI;TANAKA MASAHIRO;YAMADA TSUTOMU;TAKENOUCHI AKIRA
分类号 G06F3/00;H01L21/82;(IPC1-7):G06F3/00 主分类号 G06F3/00
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