| 摘要 |
PROBLEM TO BE SOLVED: To solve such a problem that although wiring to be formed on a semiconductor chip is affected by a manufacturing process, and the finish dimensions after manufacturing deviates from design values, any method for estimating the deviation, and for precisely reflecting it on the design is not developed. SOLUTION: Wiring 105 to be measured is placed at the center, and wiring width W, wiring interval S, wiring formation region X/Y, and data ratio D of wiring to be actually wired in the wiring formation region X×Y are variably changed so that the test pattern of wiring can be prepared. The cross-sectional shape and resistance value of the wiring 105 to be measured are measured, and one side thinning quantity Ba against the wiring width W, wiring side face inclination A, wiring side face barrier metal film thickness Ths, wiring bottom face barrier metal film thickness Thb, wiring part film thickness Tcu, and film thickness correction value Tr are used as model parameters, and a model formula with each of them as the function of W is extracted so that the wiring resistance value and inter-wiring capacity can be accurately estimated.
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