发明名称 SEMICONDUCTOR DEVICE AND ITS DESIGN METHOD
摘要 PROBLEM TO BE SOLVED: To improve the design efficiency of a design method by enabling the change of an expectation generation circuit easily in a short time. SOLUTION: In a test method of semiconductor device, data acquired by supplying a semiconductor circuit to be tested with a random pattern are compressed, and compared with an expectation, the method is characterized by providing either of a first cell 36A for selecting and outputting A between A and B inputted corresponding to the expectation in each of all bits or a part of bits constituting the expectation and a second cell 36B for selecting and outputting B, and forming the expectation ED1-EDn by the output of the first and second cells.
申请公布号 JP2003107129(A) 申请公布日期 2003.04.09
申请号 JP20010298532 申请日期 2001.09.27
申请人 FUJITSU LTD 发明人 WATANABE HITOSHI
分类号 G01R31/28;G01R31/3183;G06F11/00;H01L21/822;H01L27/04;(IPC1-7):G01R31/28;G01R31/318 主分类号 G01R31/28
代理机构 代理人
主权项
地址