SEMICONDUCTOR MEMORY DEVICE HAVING CLOCK GENERATING DEVICE FOR CONTROLLING MEMORY AND CLOCK GENERATING METHOD

摘要

PURPOSE: A semiconductor memory device having a clock generating device for controlling a memory and a clock generating method are provided to optimize a reading speed of a program memory by controlling a delay of a system clock which controls a program memory automatically. CONSTITUTION: A digital signal processor(510) generates control signals(CTRLS) for controlling a predetermined program memory unit(520) by responding to a system clock(SYSCLK), and receives an instruction from the program memory unit(520). The digital signal processor(510) is reset by responding to a predetermined reset signal(RESET). The program memory unit(520) receives the control signals(CTRLS) by responding to a predetermined clock signal(CK) and generates an instruction(DO). The instructions are stored in the program memory unit(520). A clock generating unit(530) receives the control signals(CTRLS) and the instruction(DO) by responding to the system clock(SYSCLK) and generates the clock signal(CK) for controlling the program memory unit(520) and the reset signal(RESET) for resetting the digital signal processor(510).