发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To enable preventing malfunction even if a mode is switched using two control signals /CE, /OE. SOLUTION: This device is provided with a mode recognizing means recognizing whether it is a command write-in mode or a read-out mode based on timing of two control signals, a latch command signal generating means generating a command signal commanding latching an address based on an output of the mode recognizing means, and an address buffer latching an address based on an output of the latch command signal generating means and holding or transferring latched address.</p>
申请公布号 JP2003100089(A) 申请公布日期 2003.04.04
申请号 JP20020270601 申请日期 2002.09.17
申请人 TOSHIBA CORP 发明人 MIYAGAWA TADASHI;NAKAI HIROTO;MATSUDA SHIGERU;TAURA TADAYUKI;OMINO SACHIKO
分类号 G11C16/02;(IPC1-7):G11C16/02 主分类号 G11C16/02
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