发明名称 Methods and structures for silver interconnections in integrated circuits
摘要 A typical integrated-circuit fabrication requires interconnecting millions of microscopic transistors and resistors with aluminum wires. Making the aluminum wires flush, or coplanar, with underlying insulation requires digging trenches in the insulation, and then filling the trenches with aluminum to form the aluminum wires. Trench digging is time consuming and costly. Moreover, aluminum has higher electrical resistance than other metals, such as silver. Accordingly, the invention provides a new "self-trenching" or "self-planarizing" method of making coplanar silver wires. Specifically, one embodiment forms a first layer that includes silicon and germanium; oxidizes a region of the first layer to define an oxidized region and a non-oxidized region; and reacts silver with the non-oxidized region. The reaction substitutes, or replaces, the non-oxidized region with silver to form silver wires coplanar with the first layer. Another step removes germanium oxide from the oxidized region to form a porous insulation having a very low dielectric constant, thereby reducing capacitance. Thus, the present invention not only eliminates the timing-consuming, trench-digging step of conventional methods, but also reduces resistance and capacitance which, in turn, enable faster, more-efficient integrated circuits.
申请公布号 US6541859(B1) 申请公布日期 2003.04.01
申请号 US20000614492 申请日期 2000.07.11
申请人 MICRON TECHNOLOGY, INC. 发明人 FORBES LEONARD;FARRAR PAUL A.;AHN KIE Y.
分类号 H01L21/3205;H01L21/768;H01L23/532;(IPC1-7):H01L23/48 主分类号 H01L21/3205
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